Nitride semiconductor ultraviolet light-emitting element and nitride semiconductor ultraviolet light-emitting device

ABSTRACT

There is provided a nitride semiconductor ultraviolet light-emitting element capable of efficiently releasing a waste heat generated in an ultraviolet light emitting operation. The nitride semiconductor ultraviolet light-emitting element includes a semiconductor laminated portion  11  having an n-type AlGaN layer  6 , an active layer  7  of an AlGaN layer, and p-type AlGaN layers  9  and  10 ; an n electrode  13 ; a p electrode  12 ; a protective insulating film  14 , and a first plated electrode  15  formed by a wet plating method and composed of copper or alloy containing copper as a main component. The semiconductor laminated portion  11  is formed in a first region R 1 , and the p electrode is formed on the portion  11 . An upper surface of the n-type AlGaN-based semiconductor layer  6  is exposed in a second region, and the n electrode  13  is formed on the upper surface. The protective insulating film  14  has openings for exposing at least one part of the n electrode  13  and at least one part of the p electrode  12 . The first plated electrode  15  is spaced apart from the exposed surface of the n electrode  13  and covers a whole upper surface and a whole outer side surface of the first region R 1 , and a part of the second region R 2  which is in contact with the first region R 1.

TECHNICAL FIELD

The present invention relates to a nitride semiconductor ultravioletlight-emitting element, and a nitride semiconductor ultravioletlight-emitting device having the nitride semiconductor ultravioletlight-emitting element, and more particularly, to a technique to improvean electrode structure of a nitride semiconductor ultravioletlight-emitting element to be used for flip-chip mounting, in which alight having a center emission wavelength of about 355 nm or less isextracted from a substrate side.

BACKGROUND ART

Conventionally, an AlGaN-based nitride semiconductor includes alight-emitting element or a light-receiving element having a multi-layerstructure formed on a base of a GaN layer or an AlGaN layer having arelatively low AlN mole fraction (also called an AlN mixed crystal ratioor Al composition ratio) (refer to Non-patent Document 1 and Non-patentDocument 2, for example). FIG. 16 shows a conventional crystal layerstructure of an AlGaN-based light-emitting diode. The light-emittingdiode shown in FIG. 16 has a laminated structure in which a base layer102 including an AlN layer is formed on a sapphire substrate 101, and onthe base layer 102, an n-type clad layer 103 composed of n-type AlGaN,an AlGaN/GaN multiple quantum well active layer 104, an electron blocklayer 105 composed of p-type AlGaN, a p-type clad layer 106 composed ofp-type AlGaN, and a contact layer 107 composed of p-type GaN aresequentially laminated. The multiple quantum well active layer 104 has astructure having multiple-layer structures each having a GaN well layersandwiched between AlGaN barrier layers. After crystal growth, themultiple quantum well active layer 104, the electron block layer 105,the p-type clad layer 106, and the p-type contact layer 107 arepartially etched away until a part of a surface of the n-type clad layer103 is exposed. After that, a p electrode 108 composed of Ni/Au isformed on a surface of the p-type contact layer 107, and an n electrode109 composed of Ti/Al/Ti/Au is formed on the exposed surface of then-type clad layer 103. By changing an AlN mole fraction and a thicknessof an AlGaN well layer in place of the GaN well layer, a light emissionwavelength is reduced, or by adding In, the light emission wavelength isincreased, so that the light-emitting diode having an ultraviolet lightregion from a wavelength of 200 nm to 400 nm can be manufactured.

PRIOR ART DOCUMENTS Patent Document

-   Patent Document 1: WO 2014/178288

Non-Patent Documents

-   Non-patent Document 1: Kentaro Nagamatsu, et al., “High-efficiency    AlGaN-based UV light-emitting diode on laterally overgrown AlN”,    Journal of Crystal Growth, 2008, 310, pp. 2326-2329-   Non-patent Document 2: Shigeaki Sumiya, et al., “AlGaN-Based Deep    Ultraviolet Light-Emitting Diodes Grown on Epitaxial AlN/Sapphire    Templates”, Japanese Journal of Applied Physics, Vol. 47, No. 1,    2008, pp. 43-46

SUMMARY OF THE INVENTION Problems to be Solved by the Invention

Light emission efficiency of an ultraviolet light-emitting element of anAlGaN-based semiconductor is about a few tenths to a half of that of ablue light-emitting element in an InGaN-based semiconductor.

For example, in a case where a light-emitting element is formed bygrowing an AlGaN-based semiconductor on a sapphire substrate, the AlNmole fraction of the AlGaN-based semiconductor needs to be increased toincrease bandgap energy as a light emission wavelength is decreased.Accordingly, a difference in lattice constant is increased between theAlGaN-based semiconductor and the sapphire substrate. In the AlGaN-basedsemiconductor ultraviolet light-emitting element, a lattice mismatch isincreased as the light emission wavelength is decreased, so that thereis a problem that a density of threading dislocation is increased in anAlGaN-based semiconductor thin film. The high density of the threadingdislocation causes a reduction in internal quantum efficiency of theAlGaN-based semiconductor light-emitting element. On the other hand, theblue light-emitting element does not require high bandgap energy unlikethe ultraviolet light-emitting element, so that the internal quantumefficiency is not considerably reduced due to the lattice mismatch, andthe internal quantum efficiency of about 90% can be attained.

Furthermore, the nitride semiconductor has a wurtzite-type crystalstructure, and is asymmetric in a c-axis direction, so that the nitridesemiconductor has high polarity and an electric field is generated inthe c-axis direction due to spontaneous polarization. Furthermore, thenitride semiconductor is high in piezoelectric effect, so that in a casewhere the AlGaN-based semiconductor is grown on the sapphire substratein the c-axis direction, for example, an electric field due topiezoelectric polarization (piezoelectric field) is generated in adirection normal to an interface. Here, in a case where thelight-emitting diode is manufactured by growing the crystal in thec-axis direction to have the above-described laminated structure, anelectric field generated due to a difference in spontaneous polarizationbetween both hetero interfaces of the well layer and the barrier layersis combined with a piezoelectric field due to compression strain alongthe c-axis direction, whereby an internal electric field is generated inthe well layer in the quantum well active layer. Thus, due to thisinternal electric field, in the AlGaN-based semiconductor, a potentialin each of a valence band and a conduction band falls from the n-typeclad layer toward the p-type clad layer in the well layer in the activelayer. As a result, in the well layer, the electrons are dominantlydistributed on the side of the p-type clad layer, and the holes aredominantly distributed on the side of the n-type clad layer.Accordingly, the electrons and holes are spatially isolated, therecombination is hindered, and then the internal quantum efficiencydecreases.

When indium (In) is added to the AlGaN-based semiconductor in the welllayer by about a few percents, it has been found that due to an effectof naturally generating composition fluctuation (In compositionmodulation effect) in which the In composition is non-uniformlydistributed on the order of nanometers in a crystal growth process, thelight emission efficiency can be prevented from being reduced due to theinternal electric field generated in the well layer in the quantum wellactive layer. That is, the ultraviolet light-emitting diode has areduced light emission efficiency in general, compared with the bluelight-emitting diode of the InGaN-based semiconductor containing In inlarge amounts in the nitride semiconductor in the well layer.

As described above, the light emission efficiency of the nitridesemiconductor ultraviolet light-emitting element is reduced to about afew tenths to a half of that of the blue light-emitting element, and aforward voltage applied to between the electrodes is about two timeshigher than that of the blue light-emitting element. A power which hasnot contributed to the light emission in an applied power is consumed asa waste heat, so that a heat releasing process to efficiently releasethe waste heat to the outside of the element is needed in order toprevent a junction temperature from rising due to the waste heat. Thenitride semiconductor ultraviolet light-emitting element is greatlyrequired to perform the heat releasing process, compared with the bluelight-emitting element, and especially, this is more conspicuouslyrequired in a deep ultraviolet region having a light emission wavelengthof 300 nm or less.

The nitride semiconductor ultraviolet light-emitting element isgenerally mounted by flip-chip mounting (refer to FIG. 4 in PatentDocument 1, for example). In the flip-chip mounting, the light emittedfrom the active layer passes through the AlGaN-based nitridesemiconductor and the sapphire substrate having higher bandgap energythan the active layer and is extracted outside the element. Thus, in theflip-chip mounting, the sapphire substrate faces upward, and each ofp-side and n-side electrode surfaces formed on an upper surface of achip face downward, so that the electrode surface of the chip iselectrically and physically connected to an electrode pad on a packageserving as a submount through metal bumps formed on the electrodesurfaces.

As described above, in the flip-chip mounting, the light emitted fromthe active layer passes through the AlGaN-based nitride semiconductorand the sapphire substrate having the higher bandgap energy than theactive layer and is extracted outside the element, so that the light isnot absorbed by the layer having the high bandgap energy. As a result,light extraction efficiency is high, and a heat releasing effect is highin the flip-chip mounting, compared with the conventional face-upmounting with wire bonding because the electrode surface and theelectrode pad on the package are connected through a thick and shortmetal bump having low heat resistance, instead of a thin and long wire.

However, a plurality of the metal bumps each having a spherical shape ingeneral are dispersedly disposed along an electrode shape, so that themetal bumps are difficult to uniformly form on the whole electrodesurface, which is not ideal in view of heat conduction, and a furtherimprovement is needed.

When the heat releasing process is not sufficiently performed on thenitride semiconductor ultraviolet light-emitting element, especially adeep-ultraviolet light-emitting element having a short light emissionwavelength, the junction temperature abnormally rises, which could causea reduction in light emission output, and even could cause a reductionin reliability or lifetime of the element. Thus, the light-emittingelement is required to be able to release a heat more efficiently.

The present invention has been made in view of the above problems, andits object is to provide a nitride semiconductor ultravioletlight-emitting element capable of more efficiently releasing a wasteheat generated due to light emission.

Means for Solving the Problem

In order to achieve the above object, the present invention provides, asa first feature, a nitride semiconductor ultraviolet light-emittingelement comprises a semiconductor laminated portion including, in alaminated manner, a first semiconductor layer having one or more n-typeAlGaN-based semiconductor layers, an active layer having one or moreAlGaN-based semiconductor layers having an AlN mole fraction of zero ormore, and a second semiconductor layer having one or more p-typeAlGaN-based semiconductor layers; an n electrode including one or moremetal layers; a p electrode including one or more metal layers; aprotective insulating film; and a first plated electrode which is incontact with an exposed surface of the p electrode which is not coveredwith the protective insulating film, wherein, referring to a region thatthe one nitride semiconductor ultraviolet light-emitting element isformed in a plane parallel to a surface of the semiconductor laminatedportion as an element region, the semiconductor laminated portionincludes the active layer and the second semiconductor layer laminatedon the first semiconductor layer in a first region which is a part ofthe element region, and does not include the active layer and the secondsemiconductor layer laminated on the first semiconductor layer in asecond region in the element region other than the first region,

the first region has a recess surrounding the second region from threedirections in planarly-viewed shape,

the second region continuously has a recessed region surrounded by therecess of the first region, and a periphery region other than therecessed region,

the n electrode is formed on the first semiconductor layer in the secondregion and covers the recessed region and the periphery region,

the p electrode is formed on an uppermost surface of the secondsemiconductor layer,

the protective insulating film covers at least a whole outer sidesurface of the semiconductor laminated portion in the first region, anupper surface of the first semiconductor layer provided between thefirst region and the n electrode, and an upper surface and a sidesurface of an outer edge portion of the n electrode including a portionat least facing the first region, and does not cover and exposes atleast one part of a surface of the n electrode and at least one part ofa surface of the p electrode, and

the first plated electrode is composed of copper or alloy containingcopper as a main component, formed by wet plating method, spaced apartfrom the exposed surface of the n electrode which is not covered withthe protective insulating film, and covers a whole upper surface of thefirst region including the exposed surface of the p electrode, the wholeouter side surface of the first region covered with the protectiveinsulating film, and a boundary region which is a part of the secondregion and which is in contact with the first region.

In the present invention, the AlGaN-based semiconductor is based on aternary (or binary) compound expressed by a general formula ofAl_(x)Ga_(1-x)N (x represents AlN mole fraction, 0≦x≦1), is a group-IIInitride semiconductor having bandgap energy equal to or higher thanbandgap energy (about 3.4 eV) of GaN (x=0), and includes a case where aslight amount of In is contained as long as the condition regarding thebandgap energy is satisfied.

According to the nitride semiconductor ultraviolet light-emittingelement with the first feature, when a current flows from the pelectrode to the n electrode through the second semiconductor layer, theactive layer, and the first semiconductor layer, the ultraviolet lightis emitted from the active layer, and a power which has not contributedto the light emission in the active layer is converted to a heat as awaste heat. A waste heat is also generated due to parasitic resistanceof the first semiconductor layer and the second semiconductor layer.Therefore, the waste heat is mostly generated from the semiconductorlaminated portion in the first region. Here, the n-type AlGaN-basedsemiconductor layer serves as the n-type clad layer, so that the n-typeAlGaN-based semiconductor layer needs to have higher AlN mole fractionthan the active layer, such as about 20% or more. However, when then-type AlGaN-based semiconductor layer has the high AlN mole fraction,its specific resistance is higher than n-type GaN. Accordingly, it isnecessary to prevent a voltage drop due to the parasitic resistance inthe first semiconductor layer, by shortening a distance between the nelectrode, and an interface between the n-type AlGaN-based semiconductorlayer and the active layer. Thus, according to the nitride semiconductorultraviolet light-emitting element with the first feature, the firstregion is formed into a planarly-viewed shape having the recesssurrounding the second region from the three direction, such as aplanarly-viewed comb-like shape, and the n electrode is formed on thefirst semiconductor layer and covers the recessed region and theperiphery region in the second region, so that the distance between then electrode and the above interface can be short to prevent the voltagedrop due to the parasitic resistance. Furthermore, since the firstregion has the planarly-viewed shape having the recess, acircumferential length of the first region can be large. That is, anarea of the outer side surface of the semiconductor laminated portioncan be large.

According to the nitride semiconductor ultraviolet light-emittingelement with the first feature, the first plated electrode can have alarge contact area with the whole upper surface of the first regionincluding the exposed surface of the p electrode, the whole outer sidesurface of the first region covered with the protective insulating film,and the boundary region which is a part of the second region and is incontact with the first region, which are covered with the first platedelectrode (hereinafter, the surfaces covered with the first platedelectrode are collectively referred to as the “covered surface” fordescriptive purposes). In addition, since the first region has theplanarly-viewed shape having the recess, a distance can be short betweena position in which the waste heat is generated in the semiconductorlaminated portion, and the covered surface. As a result, the waste heatcan be transmitted to the first plated electrode through the coveredsurface with high efficiency, and the heat releasing effect of thelight-emitting element can be considerably improved.

Furthermore, since the exposed surface of the n electrode which is notcovered with the protective insulating film is spaced apart from thefirst region, the spaced distance between the first plated electrode andthe exposed surface of the n electrode can be longer than a spaceddistance between the n electrode and the p electrode provided in a casewhere the first plated electrode is not formed, so that after theflip-chip mounting, an electric field being applied to the sealing resinfilled between the first plated electrode and the n electrode can bereduced. Thus, a short-circuit phenomenon between the electrodes, causedby metal diffusion (metal migration) due to a photochemical reactionbetween the sealing resin and the ultraviolet light, and due to theabove electric field can be considerably prevented from being generatedeven when there is a concern about the short-circuit phenomenondepending on a composition of the sealing resin. Furthermore, theshort-circuit phenomenon between the electrodes is described in detailin Patent Document 1.

Patent Document 1 describes that in a case where a bonding amorphousfluorine resin having a reactive functional group whose terminalfunctional group has a metal-bonding property is used for a part tocover a pad electrode of an ultraviolet light-emitting element of anitride semiconductor, when the ultraviolet light emitting operation isperformed by applying a forward voltage to between metal electrodewirings connected to a p electrode and an n electrode of the ultravioletlight-emitting element, the ultraviolet light-emitting element isdeteriorated in electric characteristics. According to Patent Document1, in the case where the amorphous fluorine resin is the bondingamorphous fluorine resin, in the bonding amorphous fluorine resinirradiated with a high-energy ultraviolet light, its reactive terminalfunctional group is separated and becomes a radical due to aphotochemical reaction, which causes coordinate bonding with a metalcomposing the pad electrode, so that the metal atom is separated fromthe pad electrode. Furthermore, when an electric field is applied to thepad electrodes during the light emitting operation, the metal atomcauses migration, so that a resistive leak current path is formed, andthe short circuit is caused between the p electrode and the n electrodeof the ultraviolet light-emitting element.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first feature, it is preferable that therecessed region of the second region is entirely covered with the firstplated electrode through the protective insulating film. Due to theabove preferable aspect, the area of the upper surface of the firstplated electrode can be considerably larger than the area of the uppersurface of the p electrode, and a contact area between the first platedelectrode and an electrode pad on a package can be considerably largeafter the flip-chip mounting, so that the heat releasing effect can befurther improved.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first feature, it is preferable that thefirst plated electrode is spaced apart from the exposed surface of the nelectrode which is not covered with the protective insulating film, by75 μm or more. Due to the above preferable aspect, the first platedelectrode can be formed with high yield without making a contact withthe exposed surface of the n electrode.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first feature, it is preferable that theprotective insulating film further covers an upper surface and a sidesurface around an outer edge portion of the p electrode, and an exposedsurface of the uppermost surface of the second semiconductor layer whichis not covered with the p electrode. Due to the above preferable aspect,since an alignment margin is provided between an end of the protectiveinsulating film on the p electrode and an outer circumference of thefirst region, the protective insulating film can surely cover the wholeouter side surface of the semiconductor laminated portion in the firstregion. Thus, the first plated electrode can be prevented from causingthe short-circuit among the first semiconductor layer, the active layer,and the second semiconductor in the semiconductor laminated portion andcover the outer side surface of the semiconductor laminated portion inthe first region through the protective insulating film.

Furthermore, as a second feature, the nitride semiconductor ultravioletlight-emitting element with the first feature further comprises a secondplated electrode formed at least on the exposed surface of the nelectrode which is not covered with the protective insulating film,formed by the wet plating method and composed of copper or alloycontaining copper as a main component, wherein the first platedelectrode and the second plated electrode are spaced apart from eachother. Due to the second feature, upper surfaces of the first platedelectrode and the second plated electrode can be level with each other,so that at the time of flip-chip mounting, the first plated electrodeand the second plated electrode can be connected to the respectiveelectrode pads on the package by the same connecting method such assoldering. Thus, the process of the flip-chip mounting can besimplified. Furthermore, the second plated electrode can be formed inthe same process as the first plated electrode.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the second feature, it is preferable thatsurfaces of the first plated electrode and the second plated electrodeare planarized and heights of the surfaces vertical to the surface ofthe semiconductor laminated portion are level with each other.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the second feature, it is preferable that aspaced distance between the first plated electrode and the second platedelectrode is 75 μm or more. Due to the above preferable aspect, thefirst plated electrode and the second plated electrode can be formedwith high yield without coming in contact with each other.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the second feature, it is preferable that asingle-layer or multiple-layer plated metal film including gold at leaston an uppermost layer is formed on each of the surfaces of the firstplated electrode and the second plated electrode. Due to the abovepreferable aspect, even when it takes a long time before the flip-chipmounting is performed after the first plated electrode and the secondplated electrode have been formed, the surfaces of the first platedelectrode and the second plated electrode can be prevented from beingoxidized. Thus, the first plated electrode and the second platedelectrode can be surely connected to the respective electrode pads onthe package with a solder or the like. Furthermore, the above aspect ispreferable in a case where a gold (Au) bump is formed on the platedmetal film.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that an outer periphery of the first plated electrode isentirely located on the n electrode through the protective insulatingfilm. Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that the first plated electrode is formed and filled in adent in the recessed region surrounded by the outer side surface of thesemiconductor laminated portion in the first region, and an uppersurface of the first plated electrode is wholly flat. Due to the abovepreferable aspect, the area between the first plated electrode and theelectrode pad on the package which are connected with the solder or thelike can be further largely ensured at the time of the flip-chipmounting. Thus, after the flip-chip mounting, the heat can be morelikely to be released through the first plated electrode which is closeto the active layer serving as the greatest heat generation source, andthe heat releasing effect can be further improved.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that the wet plating method includes an electrolytic platingmethod, and a power-feeding seed film used in the electrolytic platingmethod is formed between the protective insulating film and the firstplated electrode.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that the protective insulating film includes a transparentinsulating film composed of an insulating material which transmitsultraviolet light emitted from the active layer, and an ultravioletlight refractive layer is formed between the protective insulating filmand the seed film to reflect the ultraviolet light at a reflectivityhigher than an ultraviolet light reflectivity of the seed film.

When the protective insulating film is the transparent insulating film,the ultraviolet light emitted from the active layer of the semiconductorlaminated portion partially enters the seed film through the transparentinsulating film. In this case, this ultraviolet light is reflected fromthe seed layer toward the semiconductor laminated portion only at anultraviolet light reflectivity corresponding to a light emissionwavelength of the ultraviolet light, so that the non-reflectedultraviolet light cannot be effectively used. However, by providing theultraviolet light reflective layer having the higher ultraviolet lightreflectivity, between the protective insulating film and the seed film,the ultraviolet light entering toward the seed film can be moreeffectively used, so that external quantum efficiency of the ultravioletlight-emitting element can be improved.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that the protective insulating film includes a transparentinsulating film composed of an insulating material which transmitsultraviolet light emitted from the active layer, and an opaqueinsulating film is formed at least one part on the protective insulatingfilm between the first plated electrode and the exposed surface of the nelectrode, and composed of an insulating material which does nottransmit the ultraviolet light emitted from the active layer.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting element with the first or second feature, it ispreferable that the protective insulating film includes an opaqueinsulating film composed of an insulating material which does nottransmit the ultraviolet light emitted from the active layer.

In the case where the protective insulating film is the transparentinsulating film, when the ultraviolet light is partially reflected at aninterface on a back surface side serving as a light extracting side ofthe semiconductor laminated portion and travels toward the active layer,there is a slight possibility that this ultraviolet light partiallyenters a part in which the first plated electrode is not formed on theprotective insulating film (a gap portion) and is extracted outside theelement through the gap portion. This ultraviolet light emitted outsidethe element through the gap portion enters a sealing resin filled in agap between the n electrode or the second plated electrode connectedwith the n electrode, and the first plated electrode at the time offlip-chip mounting. However, by providing the above opaque insulatingfilm, the ultraviolet light is prevented from entering the gap, so thatthe sealing resin can be prevented from being deteriorated due to theentering of the ultraviolet light.

The present invention provides a nitride semiconductor ultravioletlight-emitting device, as a first aspect, comprising a base including ametal film on a surface of an insulating base material, the metal filmhaving a predetermined planarly-viewed shape and including two or moreelectrode pads, and the nitride semiconductor ultraviolet light-emittingelement in at least one of the first and second features mounted on thebase with the first plated electrode facing the electrode pad, whereinthe first plated electrode is electrically and physically connected tothe opposed electrode pad. That is, the nitride semiconductorultraviolet light-emitting device with the first feature has the mountednitride semiconductor ultraviolet light-emitting element with the abovefeature by flip-chip mounting and provides the same operation and effectas the nitride semiconductor ultraviolet light-emitting element with theabove feature.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting device with the first feature, as a second feature, thenitride semiconductor ultraviolet light-emitting element furtherincludes a second plated electrode formed at least on an exposed surfaceof the n electrode which is not covered with the protective insulatingfilm, formed by the wet plating method, and composed of copper or alloycontaining copper as a main component, wherein the first platedelectrode and the second plated electrode are spaced apart from eachother, and wherein the first plated electrode is electrically andphysically connected to the one electrode pad, and the second platedelectrode is electrically and physically connected to the otherelectrode pad, in the one nitride semiconductor ultravioletlight-emitting element. According to the second feature, the uppersurfaces of the first plated electrode and the second plated electrodecan be level with each other, so that at the time of flip-chip mounting,the first plated electrode and the second plated electrode can beconnected to the respective electrode pads on the base by the sameconnecting method such as soldering. Thus, the process of the flip-chipmounting can be simplified.

Furthermore, according to the nitride semiconductor ultravioletlight-emitting device with the second feature, it is preferable that thebase includes a plurality of couples of electrode pads which eachinclude a first electrode pad and at least one second electrode padelectrically separated from the first electrode pad, a plurality of thenitride semiconductor ultraviolet light-emitting elements are mounted onthe base, and the first plated electrode in the one nitridesemiconductor ultraviolet light-emitting element is electrically andphysically connected to the first electrode pad in the one couple ofelectrode pads, and the second plated electrode in the one nitridesemiconductor ultraviolet light-emitting element is electrically andphysically connected to the second electrode pad in the one couple ofelectrode pads. According to the preferable aspect, each of the nitridesemiconductor ultraviolet light-emitting elements mounted on the baseincludes the first plated electrode and the second plated electrode, andupper surfaces of the electrodes can be level with each other, so thatat the time of flip-chip mounting, the first plated electrode and thesecond plated electrode in each of the nitride semiconductor ultravioletlight-emitting elements can be connected to the respective electrodepads on the package by the same connecting method such as soldering.Thus, the process of mounting a plurality chips by the flip-chipmounting can be simplified.

Effect of the Invention

According to the nitride semiconductor ultraviolet light-emittingelement and device with the above features, the waste heat due to thelight emission can be efficiently released, and the light emissionoutput is improved and the reliability and the lifetime can be improvedin each of the nitride semiconductor ultraviolet light-emitting elementand device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view schematically showing one example of anelement structure taken along a line A-A′ in first to fifth embodimentsof a nitride semiconductor ultraviolet light-emitting element in thepresent invention, in which a protective insulating film, and first andsecond plated electrodes are not formed yet.

FIG. 2 is a cross-sectional view schematically showing one example of anelement structure taken along a line B-B′ in the first to fifthembodiments of the nitride semiconductor ultraviolet light-emittingelement in the present invention, in which the protective insulatingfilm, and the first and second plated electrodes are not formed yet.

FIG. 3 is an essential part cross-sectional view schematically showingan essential part of the element structure shown in FIGS. 1 and 2.

FIG. 4 is a cross-sectional view schematically showing one example of anelement structure taken along the line A-A′ in the first and fifthembodiments of the nitride semiconductor ultraviolet light-emittingelement in the present invention, in which the protective insulatingfilm, and the first and second plated electrodes are formed.

FIG. 5 is a cross-sectional view schematically showing one example of anelement structure taken along the line B-B′ in the first and fifthembodiments of the nitride semiconductor ultraviolet light-emittingelement in the present invention, in which the protective insulatingfilm, and the first and second plated electrodes are formed.

FIG. 6 is a plan view schematically showing one example of a planarstructure and a planarly-viewed pattern of a first region and a secondregion in the first to fifth embodiments of the nitride semiconductorultraviolet light-emitting element in the present invention, in which ap electrode, an n electrode, and the first and second plated electrodesare not formed yet.

FIG. 7 is a plan view schematically showing one example of a planarstructure and a planarly-viewed pattern of the p electrode and the nelectrode in the first to fifth embodiments of the nitride semiconductorultraviolet light-emitting element in the present invention, in whichthe first and second plated electrodes are not formed yet.

FIG. 8 is a plan view schematically showing one example of a planarstructure and a planarly-viewed pattern of the protective insulatingfilm in the first to fifth embodiments of the nitride semiconductorultraviolet light-emitting element in the present invention, in whichthe first and second plated electrodes are not formed yet.

FIG. 9 is a plan view schematically showing one example of aplanarly-viewed pattern of the first and second plated electrodes in thefirst to fifth embodiments of the nitride semiconductor ultravioletlight-emitting element in the present invention.

FIG. 10 is a cross-sectional view schematically showing one example ofan element structure taken along the line B-B′ in the second embodimentof a nitride semiconductor ultraviolet light-emitting element in thepresent invention.

FIG. 11 is a cross-sectional view schematically showing one example ofan element structure taken along the line B-B′ in the third embodimentof a nitride semiconductor ultraviolet light-emitting element in thepresent invention.

FIG. 12 is a cross-sectional view schematically showing one example ofan element structure taken along the line B-B′ in the fourth embodimentof a nitride semiconductor ultraviolet light-emitting element in thepresent invention.

FIG. 13 is a cross-sectional view schematically showing oneconfiguration example of a nitride semiconductor ultravioletlight-emitting device in the present invention.

FIGS. 14A and 14B are a plan view and a cross-sectional viewschematically showing a planar shape and a cross-sectional shape of asubmount to be used in the nitride semiconductor ultravioletlight-emitting device shown in FIG. 13, respectively.

FIG. 15 is a cross-sectional view schematically showing a structure ofan essential part of the nitride semiconductor ultravioletlight-emitting device shown in FIG. 13.

FIG. 16 is a cross-sectional view schematically showing a conventionalcrystal layer structure of an AlGaN-based light-emitting diode.

DESCRIPTION OF EMBODIMENT

A nitride semiconductor ultraviolet light-emitting element in each ofembodiments in the present invention (hereinafter, referred to as the“present light-emitting element” occasionally) will be described withreference to the drawings. In addition, for easy understanding of thedescription, an essential part is emphasized to schematically illustrateinvention contents in the drawings used in the following description, sothat a dimensional ratio of each component does not correspond to adimensional ratio of an actual element and a component actually to beused. Hereinafter, the description will be given supposing a case wherethe present light-emitting element is a light-emitting diode.

First Embodiment

As shown in FIGS. 1 to 3, the present light-emitting element 1 includesa template 5 in which an AlN layer 3 and an AlGaN layer 4 have beengrown on a sapphire (0001) substrate 2, and a semiconductor laminatedportion 11 including an n-type clad layer 6 composed of n-type AlGaN, anactive layer 7, an electron block layer 8 composed of p-type AlGaN andhaving a higher AlN mole fraction than the active layer 7, a p-type cladlayer 9 composed of p-type AlGaN, and a p-type contact layer 10 composedof p-type GaN which are sequentially laminated on the template 5. Then-type clad layer 6 corresponds to a first semiconductor layer, and eachof the electron block layer 8, the p-type clad layer 9, and the p-typecontact layer 10 corresponds to a second semiconductor layer. The activelayer 7, the electron block layer 8, p-type clad layer 9, and the p-typecontact layer 10 formed on the n-type clad layer 6 in a certainplanarly-viewed region (second region R2) are removed by reactive ionetching until a surface of the n-type clad layer 6 is exposed, and thelaminated structure from the active layer 7 to the p-type contact layer10 in a first region R1 is formed on the n-type clad layer 6. The activelayer 7 has a single-layer quantum well structure composed of an n-typeAlGaN barrier layer 7 a having a thickness of 10 nm, and an AlGaN or GaNwell layer 7 b having a thickness of 3.5 nm, for example. The activelayer 7 has a double hetero junction structure in which it is sandwichedbetween the lower and upper n-type and p-type AlGaN layers each having ahigher AlN mole fraction, or may have a multiple quantum well structurecomposed of a plurality of the above single-layer quantum wellstructures.

Each AlGaN layer is formed by a known epitaxial growth method such asmetal-organic vapor phase epitaxy (MOVPE) method or molecular beamepitaxy (MBE) method, in which Si is used as a donor impurity for then-type layer, and Mg is used as an acceptor impurity for the p-typelayer, for example. Furthermore, when a conductivity type is not shownin the AlN layer and the AlGaN layer, the layers are undoped layerswhich are not doped with an impurity. As for thicknesses of the AlGaNlayers other than the active layer 7, for example, the n-type clad layer6 is 2000 nm, the electron block layer 8 is 2 nm, the p-type clad layer9 is 540 nm, and the p-type contact layer 10 is 200 nm. However, thethickness of each AlGaN layer is not limited to the above value.

A p electrode 12 composed of Ni/Au, for example, is formed on a surfaceof the p-type contact layer 10, and an n electrode 13 composed ofTi/Al/Ti/Au, for example, is formed on the surface of the n-type cladlayer 6 in the second region R2. Furthermore, the number, materials, andthicknesses of the metal layers in each of the p electrode 12 and the nelectrode 13 are not limited to the above number and materials, and thethicknesses to be described below.

Here, when a region that one unit of the present light-emitting element1 (one light-emitting element) is formed in a plane parallel to asurface of the substrate 2 is defined as an element region fordescriptive purpose, the element region is composed of the first regionR1 and the second region R2. In addition, in the following description,the element region does not include a scribing region serving as acutting margin used when the plurality of present light-emittingelements 1 arranged in a matrix on a wafer are diced into individualchips. Furthermore, for descriptive purposes, an X-Y-Z rectangularcoordinate system is supposed in which an X-Y plane is parallel to thesurface of the substrate 2, a Z direction is a thickness direction ofthe element, and X-Y coordinates (0, 0) is a center of the elementregion of the present light-emitting element 1. Thus, FIG. 1 is across-sectional view of the present light-emitting element 1 parallel toan X-Z plane along a line A-A′ in a plan view shown in FIG. 8, and FIG.2 is a cross-sectional view of the present light-emitting element 1parallel to the X-Z plane along a line B-B′ in the above plan view.FIGS. 1 and 2 each schematically shows an element structure in a statewhere the semiconductor laminated portion 11 is formed on the template5, and the p electrode 12 and the n electrode 13 are formed on thesemiconductor laminated portion, but a protective insulating film 14, afirst plated electrode 15, and a second plated electrode 16 which willbe described below are not formed yet. Hereinafter, for descriptivepurposes, the element structure of the present light-emitting element 1in which the protective insulating film 14 and the first and secondplated electrodes 15 and 16 are not formed yet is referred to as the“pre-plating element structure”. FIG. 3 schematically shows an essentialpart cross-sectional view of the pre-plating element structure of thepresent light-emitting element 1 shown in FIGS. 1 and 2.

As shown in FIGS. 1 to 3, the semiconductor laminated portion 11 in thefirst region R1 has a multiple-layer structure including the n-type cladlayer 6 to the p-type contact layer 10 and projects from the exposedsurface of the n-type clad layer 6 in the second region R2 in the Zdirection. Hereinafter, the semiconductor laminated portion 11 in thefirst region R1 is referred to as the “mesa” for descriptive purposes.An uppermost surface of the mesa is an upper surface of the p-typecontact layer 10, and a difference in the Z direction between theuppermost surface of the mesa (in the first region R1) and the exposedsurface of the n-type clad layer 6 (in the second region R2) (a stepdifference of the mesa) is found by adding a total thickness from theactive layer 7 to the p-type contact layer 10, to a depth removed fromthe surface of the n-type clad layer 6 by the etching process in the −Zdirection, which is about 800 nm. If a dimension (chip size) of theelement region in the X and Y directions is about 0.8 mm to 1.5 mm, theabove step difference is extremely as small as 0.1% or less of the chipsize, which considerably differs from the schematically illustrateddimension ratio in the drawings.

FIGS. 4 and 5 schematically show one example of an element structure ofthe present light-emitting element 1 in which the protective insulatingfilm 14, the first plated electrode 15, and the second plated electrode16 are formed. FIG. 4 is a cross-sectional view parallel to the X-Zplane along the line A-A′ in the plan view in FIG. 8, and FIG. 5 is across-sectional view of the present light-emitting element 1 parallel tothe X-Z plane along the line B-B′ in the above plan view. In FIGS. 1 to5, hatched portions correspond to the p electrode 12 and the n electrode13, and in FIGS. 4 and 5, a dot-patterned portion correspond to thefirst and second plated electrodes 15 and 16 (the same is true in FIGS.10 to 12, and 15).

FIG. 6 shows one example of a planarly-viewed pattern of the firstregion R1 and the second region R2 in which the p electrode 12, the nelectrode 13, the first plated electrode 15, and the second platedelectrode 16 are not formed yet. In FIG. 6, a hatched portioncorresponds to the first region R1. In a planarly-viewed pattern in FIG.6, the first region R1 has a comb-like shape having four recesses in anupper side (Y>0) in the drawing, and four recesses in a lower side (Y<0)in the drawing. In FIG. 6, in the second region R2, a dot-patternedportion is applied to two recessed regions R3 each surrounded by therecess from three directions, to separate the recessed region R3 from aperiphery region in the second region R2. The second region R2 includeseight recessed regions R3, and the periphery region R4 which surroundsthe recessed regions R3 and the first region R1. In FIG. 6, a brokenline C shows a boundary between the recessed region R3 and the peripheryregion R4. Furthermore, in the recessed region R3 surrounded by therecess from the three directions in FIG. 6, a straight line passingthrough a certain point in the recessed region R3 surely intersects withthe first region R1. As for a part of the straight line, both sidesprovided across the certain point intersect with the first region R1,while as for the other part of the straight line, one side providedacross the certain point intersects with the first region R1 but theother side thereof does not intersect with the first region R1.

FIG. 7 shows one example of the planarly-viewed pattern of the pelectrode 12 and the n electrode 13 in which the first plated electrode15 and the second plated electrode 16 are not formed yet. In FIG. 7,hatched portions correspond to the p electrode 12 and the n electrode13. Furthermore, a boundary line BL between the first region R1 and thesecond region R2 is shown for reference. It can be seen from FIG. 7,compared with FIG. 6, that the n electrode 13 is continuously formedover the recessed region R3 and the periphery region R4 and formedcircularly around the first region R1. Furthermore, the p electrode 12is formed into a comb-like shape having recesses on an upper side and alower side in the drawing, similar to the first region R1. An outer lineof the p electrode 12 is retreated inside the first region R1 from anouter line (boundary line between the first region R1 and the secondregion R2) of the first region R1 by about 10 μm, for example.Furthermore, an inner line of the n electrode 13 is retreated toward thesecond region R2 from the outer line of the first region R1 by about 10μm, and an outer line of the n electrode 13 is retreated inside from anouter line of the element region and further retreated inside from anouter line of the protective insulating film 14 by about 10 μm, forexample.

FIG. 8 shows one example of a planarly-viewed pattern of the protectiveinsulating film 14 in which the first plated electrode 15 and the secondplated electrode 16 are not formed yet. The protective insulating film14 is provided almost a whole surface of the element region, and itsouter line is provided in alignment with the outer line of the elementregion or may be slightly retreated inside from the outer line of theelement region by about 10 μm, for example. The protective insulatingfilm 14 has a first opening 17 in the first region R1, and four secondopenings 18 at four corners in the periphery region R4. The p electrode12 and the n electrode 13 are exposed in the first opening 17 and thesecond opening 18, respectively without being covered with theprotective insulating film 14. Therefore, the n electrode 13 is coveredwith the protective insulating film 14 except for the portion exposed inthe second opening 18. An outer line of the first opening 17 isretreated inside the first region R1 from the outer line of the firstregion R1 by about 5 μm to 15 μm, for example. Here, the outer line ofthe first opening 17 may be provided on the same position, outside, orinside the outer line of the p electrode 12. In FIG. 8, a dot-patternedportion corresponds to the protective insulating film 14, and hatchedportions correspond to the p electrode 12 exposed in the first opening17 and the n electrode 13 exposed in the second opening 18. Furthermore,the boundary line BL between the first region R1 and the second regionR2 is shown for reference.

In this embodiment, the protective insulating film 14 is a SiO₂ film orAl₂O₃ film formed by chemical vapor deposition (CVD) to have a thicknessof 100 nm to 1 μm, and more preferably a thickness of 150 nm to 350 nm.As shown in FIGS. 4, 5, and 8, the protective insulating film 14 coversat least a whole outer side surface of the semiconductor laminatedportion 11 (side wall surface of the step difference portion of themesa) in the first region R1, the exposed surface of the n-type cladlayer 6 between the first region R1 and the n electrode 13, and an uppersurface and a side surface of an outer edge portion of the n electrode13 including a portion which is at least facing the first region R1.However, the protective insulating film 14 does not cover and exposes atleast one portion of the surface of the p electrode 12 in the firstopening 17, and does not cover and exposes at least one portion of thesurface of the n electrode 13 in the second opening 18. Thus, the firstplated electrode 15 is electrically connected to the p electrode 12through the first opening 17 and a seed film 19 which will be describedbelow, and the second plated electrode 16 is electrically connected tothe n electrode 13 through the second opening 18 and a seed film 19which will be described below.

Furthermore, the protective insulating film 14 is provided to preventthe first plated electrode 15 from being in direct contact with theexposed surface of the n-type clad layer 6 and the side end surface ofthe p-type clad layer 9 so that a bypass is prevented from being formedin a current path from the p-type clad layer 9 to the n-type clad layer6 through the active layer 7. Therefore, even in a case where theprotective insulating film 14 is slightly retreated toward a lowerportion from an upper end of the step difference portion of the mesa,and the upper end of a side wall of the step difference portion of themesa, that is, a side end surface of the p-type contact layer 10 ispartially exposed and is in direct contact with the first platedelectrode 15, the bypass is not formed, so that the light-emittingoperation can be properly performed. Therefore, in FIGS. 4, 5, and 8,the protective insulating film 14 covers the exposed surface of thep-type contact layer 10 which is not covered with the p electrode 12,but the exposed surface of the p-type contact layer 10 is notnecessarily covered with the protective insulating film 14. Theprotective insulating film 14 does not cover an outer end of the pelectrode 12 in FIGS. 4, 5, and 8, but the protective insulating film 14may cover the outer end of the p electrode 12.

FIG. 9 shows one example of a planarly-viewed pattern of the firstplated electrode 15 and the second plated electrode 16. In FIG. 9, adot-patterned portion corresponds to the first plated electrode 15 andthe second plated electrode 16. Furthermore, the boundary line BLbetween the first region R1 and the second region R2 is shown forreference. Each of outer lines of the first plated electrode 15 and thesecond plated electrode 16 is located on the protective insulating film14 in the second region R2, and an adjacent distance between the firstplated electrode 15 and the second plated electrode 16 is 75 μm or more.This distance is preferably 100 μm or more, and more preferably 100 □mto 150 μm. The outer line of the first plated electrode 15 is preferablylocated on the n electrode 13 through the protective insulating film 14,but the outer line of the first plated electrode 15 may have a partwhich is not located above the n electrode 13, depending on theplanarly-viewed shape of the n electrode 13. Furthermore, in FIG. 9, theouter line of the first plated electrode 15 is located in the peripheryregion R4 in the second region R2, but the outer line of the firstplated electrode 15 may partially enter the recessed region R3,depending on a shape or a size of the recessed region R3. The outer lineof the second plated electrode 16 is preferably provided outside theouter line of the second opening 18 of the protective insulating film 14by about 0 μm to 30 μm, for example. However, the outer line of thesecond plated electrode 16 may be partially or entirely provided inalignment with or inside the outer line of the second opening 18 of theprotective insulating film 14. This is because even in this case, the nelectrode 13 not covered with the second plated electrode 16 is onlyexposed from the second opening 18, so that there is no problem inparticular as long as a distance between the exposed n electrode 13 andthe first plated electrode 15 can be ensured similarly to the abovedistance between the first plated electrode 15 and the second platedelectrode 16, and as long as an area of an upper surface of the secondplated electrode 16 is large enough to be properly soldered as will bedescribed below. The second region R2 provided inside the outer line ofthe first plated electrode 15 corresponds to a part of the second regionR2 provided in the first plated electrode 15, that is, this partcorresponds to a boundary region which is in contact with the firstregion R1.

In this embodiment, each of the first and second plated electrodes 15and 16 is made of copper by a known electrolytic plating method.Furthermore, each of the first and second plated electrodes 15 and 16may be made of alloy containing copper as a main component and metalsuch as lead (Pb), iron (Fe), zinc (Zn), manganese (Mn), nickel (Ni),cobalt (Co), beryllium (Be). However, when the alloy is used, heatconductivity becomes low, so that copper is preferably used.

As shown in FIGS. 4, 5, and 9, the first plated electrode 15 is formedto cover the whole uppermost layer of the first region R1 including theexposed surface of the p electrode 12 which is not covered with theprotective insulating film 14, the whole outer side surface of thesemiconductor laminated portion 11 (side wall surface of the stepdifference portion of the mesa) in the first region R1 which is coveredwith the protective insulating film 14, and the boundary region which isin contact with the first region R1 and surrounds the first region R1,as one part of the second region R2. Furthermore, as shown in FIGS. 4,5, and 9, the second plated electrode 16 is formed at least on theexposed n electrode 13 in the second opening 18 of the protectiveinsulating film 14, and preferably also formed on the protectiveinsulating film 14 provided around the second opening 18. Since thesecond plated electrode 16 is circular in planar view in FIG. 9, theouter line of the first plated electrode 15 which is adjacently opposedto the second plated electrode 16 is designed to have an arc shape, sothat the distance can be kept constant between the first platedelectrode 15 and the second plated electrode 16 in this adjacentlyopposed region. Thus, an electric field is prevented from locallyconcentrating between the first plated electrode 15 and the secondplated electrode 16. Therefore, in this viewpoint, the planarly-viewedshape of the second plated electrode 16 may be a fan shape other thanthe circular shape. In addition, the planarly-viewed shape of the secondplated electrode 16 may be a rectangular shape having at least anarc-shaped corner which is opposed to the first plated electrode 15.

The thickness of each of the first and second plated electrodes 15 and16 may be 45 μm or more, or a half or more of a distance between thefirst plated electrodes 15 with the recessed region R3 providedtherebetween. Especially, the thickness of each of the first and secondplated electrodes 15 and 16 is preferably 45 μm to 100 μm, and morepreferably 50 μm to 75 μm in the viewpoint of the manufacturing process.When the thickness is too small, each of the plated electrodes 15 and 16is likely to be affected by warpage of the wafer, and its surfacebecomes hard to planarize, so that the thickness is preferably 45 μm ormore.

Furthermore, the first and second plated electrodes 15 and 16 can bereadily formed to have the thickness of 45 μm or more by theelectrolytic plating method included in a wet plating method, withoutusing a method included in a dry plating method such as vapor depositionwhich is used in a wafer manufacturing process. If the electrode havingthe same thickness as those of the first and second plated electrodes 15and 16 is formed by the vapor deposition, it takes too long to form thefilm, which is extremely low in efficiency and not realistic. On theother hand, if the first and second plated electrodes 15 and 16 areformed not by the electrolytic plating but by the vapor depositionwithin a realistic time, the thickness is as thin as the p electrode 12and the n electrode 13, so that the first plated electrode 15 cannothave a wholly flat surface. Thus, a planarly-viewed shape of anuppermost surface of the first plated electrode 15 is almost the same asthe planarly-viewed shape of the first region R1, so that a contact areawith an electrode pad on a package cannot be large after the flip-chipmounting. Thus, the thin first plated electrode 15 only complicates anelectrode structure and cannot achieve an original purpose ofefficiently releasing the waste heat generated due to light emission.

on the n-type clad layer 6. A thickness of the four-layer metal film ofTi/Al/Ti/Au is, for example, 20 nm/100 nm/50 nm/100 nm, respectively.

Subsequently, a photoresist having a reverse pattern of the p electrode12 is formed on the whole substrate surface, and a two-layer metal filmof Ni/Au is deposited as the p electrode 12 by an electron beamevaporation method. The photoresist is removed by a liftoff method, thetwo-layer metal film on the photoresist is peeled-off, and heattreatment such as RTA is performed at 450° C., for example. Accordingly,the p electrode 12 is formed on the surface of the p-type contact layer10. A thickness of the two-layer metal film of Ni/Au is, for example, 60nm/50 nm, respectively.

Thus, the pre-plating element structure of the present light-emittingelement 1 as shown in FIGS. 1 and 2 is completed. The pre-platingelement structure shown in FIGS. 1 and 2 has the semiconductor laminatedportion 11, the p electrode 12, and the n electrode 13 which arerequired to serve as the light-emitting element, so that the presentlight-emitting element 1 may be mounted on a submount in this stage byflip-chip mounting and sealed with resin so as to be able to function asthe light-emitting element.

FIGS. 4 and 5 each show the cross-sectional structure of the firstplated electrode 15 and the second plated electrode 16 formed by theelectrolytic plating method, and the seed film 19 for feeding a power inthe electrolytic plating is formed under the first plated electrode 15and the second plated electrode 16. The power-feeding seed film 19 inthe electrolytic plating is made of a Ni film or Ti/Cu film having athickness of about 10 nm to 100 nm. The seed film 19 is not limited tothe Ni film or the Ti/Cu film as long as the seed film 19 is made of anelectrically conductive material having a bonding property to theprotective insulating film 14 at the lower side and the first and secondplated electrodes 15 and 16 at the upper side.

In addition, in this embodiment, as shown in FIGS. 6 to 9, theplanarly-viewed shapes of the first and second regions R1 and R2, theprotective insulating film 14, and the first and second platedelectrodes 15 and 16 are linearly symmetrical with respect to the X axisand the Y axis, but they are not necessarily linearly symmetrical withrespect to the X axis and the Y axis. For example, the second platedelectrodes 16 and the second openings 18 are not always required to beprovided at four corners, and the second plated electrodes 16 and thesecond openings 18 may be provided at any number of positions in theperiphery region R4, such as at two diagonal corners in the peripheryregion R4. Furthermore, the planarly-viewed shapes of the first regionR1, the p electrode 12, and the first opening 17 are not limited to thecomb-like shape as shown in FIGS. 6 to 8.

Hereinafter, a method for manufacturing the present light-emittingelement 1 will be described. First, a brief description will be given toa process for manufacturing the pre-plating element structure shown inFIGS. 1 and 2 in which the protective insulating film 14, the firstplated electrode 15, and the second plated electrode 16 are not formedyet.

First, the template 5 and layers from the n-type clad layer 6 to thep-type contact layer 10 are formed on the sapphire (0001) substrate 2 bya known growth method such as MOVPE method. After the p-type contactlayer 10 is formed, a heat treatment is performed, for example, at 800°C. to activate the acceptor impurity. Then, the surface of the p-typecontact layer 10 in the first region R1 is covered with, for example, aNi mask by a known photolithography method, and the layers from theactive layer 7 to the p-type contact layer 10 formed on the n-type cladlayer 6 in the region except for the first region R1 are removed byreactive ion etching until the surface of the n-type clad layer 6 isexposed. After that, the Ni mask is removed. As a result, thesemiconductor laminated portion 11 including the n-type clad layer 6 tothe p-type contact layer 10 is formed on the template 5 in the firstregion R1, and the n-type clad layer 6 having the exposed surface isformed on the template 5 in the second region R2.

Subsequently, a photoresist having a reverse pattern of the n electrode13 is formed on the whole surface of the substrate, and a four-layermetal film of Ti/Al/Ti/Au is deposited as the n electrode 13 by anelectron beam evaporation method. The photoresist is removed by aliftoff method, the four-layer metal film on the photoresist ispeeled-off, and a heat treatment such as rapid thermal anneal (RTA) isperformed as needed. Accordingly, the n electrode 13 is formed on then-type clad layer 6. A thickness of the four-layer metal film ofTi/Al/Ti/Au is, for example, 20 nm/100 nm/50 nm/100 nm, respectively.

Subsequently, a photoresist having a reverse pattern of the p electrode12 is formed on the whole substrate surface, and a two-layer metal filmof Ni/Au is deposited as the p electrode 12 by an electron beamevaporation method. The photoresist is removed by a liftoff method, thetwo-layer metal film on the photoresist is peeled-off, and heattreatment such as RTA is performed at 450° C., for example. Accordingly,the p electrode 12 is formed on the surface of the p-type contact layer10. A thickness of the two-layer metal film of Ni/Au is, for example, 60nm/50 nm, respectively.

Thus, the pre-plating element structure of the present light-emittingelement 1 as shown in FIGS. 1 and 2 is completed. The pre-platingelement structure shown in FIGS. 1 and 2 has the semiconductor laminatedportion 11, the p electrode 12, and the n electrode 13 which arerequired to serve as the light-emitting element, so that the presentlight-emitting element 1 may be mounted on a submount in this stage byflip-chip mounting and sealed with resin so as to be able to function asthe light-emitting element.

However, the present light-emitting element 1 further includes theprotective insulating film 14, the first plated electrode 15, and thesecond plated electrode 16, in addition to the pre-plating structureshown in FIGS. 1 and 2, in order to efficiently release the waste heatgenerated due to the light-emitting operation. Hereinafter, a processfor manufacturing the protective insulating film 14, the first platedelectrode 15, and the second plated electrode 16 will be described.

The protective insulating film 14 such as SiO₂ film or Al₂O₃ film isformed on the whole substrate surface by a method such as CVD method. Athickness of the protective insulating film 14 is about 150 nm to 350nm, for example. A temperature for forming the protective insulatingfilm 14 is to be about 600° C. which is not higher than a lowesttemperature among the film formation temperature and the heat treatmenttemperature to form the pre-plating element structure shown in FIGS. 1and 2.

Subsequently, the protective insulating film 14 formed on the wholesubstrate surface is partially etched away. Specifically, a regionexcept for the first opening 17, the second opening 18, and a scribingregion is covered with a mask layer by a known photolithographytechnique, the protective insulating film 14 formed on the wholesubstrate surface is removed by dry etching such as known reactive ionetching, and then the mask layer is removed. Thus, the first opening 17and the second opening 18 are formed in the protective insulating film14 in the element region. The process until this point is a wafermanufacturing process of a nitride semiconductor, and a process fromthis point is a plating process which is low in alignment precision.However, the plating process in the following description is performedon the wafer sequentially after the wafer manufacturing process.

Subsequently, the power-feeding seed film 19 to be used for theelectrolytic plating is formed on the whole substrate surface bysputtering Ni, for example.

Subsequently, a photo-sensitive sheet film to be used for the plating ispasted on the seed film 19, and the film pasted in the regions for thefirst plated electrode 15 and the second plated electrode 16 is removedby exposure and developing by photolithography technique to expose theseed film 19. Then, a power is applied to the seed film 19, and thefirst plated electrode 15 and the second plated electrode 16 are formedon the exposed seed film 19 by an electrolytic plating method.Subsequently, the sheet film which is not covered with the first platedelectrode 15 and the second plated electrode 16 is removed by using anorganic solvent, and the seed film 19 which is not covered with thefirst plated electrode 15 and the second plated electrode 16 is removedby wet etching.

Thicknesses of the first plated electrode 15 and the second platedelectrode 16 just after the plating process are almost the same, butsince the first plated electrode 15 covers the first region R1 and onepart of the second region R2, there are step differences among the mesa,the p electrode 12, the n electrode 13, and the first opening in theprotective insulating film 14, under the first plated electrode 15. Inaddition, as for the electrolytic plating method, an electric field isnot uniformly applied to the seed film 19 in some cases, which couldcause a variation in thickness between the first plated electrode 15 andthe second plated electrode 16 just after the plating process.Therefore, due to the step differences and the variation in thickness,the upper surface of the first plated electrode 15 just after platingprocess is possibly uneven due to the above step differences, and thefirst plated electrode 15 and the second plated electrode 16 arepossibly different in height. Furthermore, the “height” in thisembodiment means a distance in the Z direction from a certain position(such as the surface of the substrate 2) in the Z direction.

Therefore, in the first embodiment, the upper surfaces of the first andsecond plated electrodes 15 and 16 are polished by a known polishingmethod such as chemical mechanical polishing (CMP) to remove theunevenness and planarize the upper surfaces of the first and secondplated electrodes 15 and 16, and to make uniform the height of the uppersurfaces of the first and second plated electrodes 15 and 16. Thepreferable thickness of the polished first plated electrode 15 and thepolished second plated electrode 16 (height from the upper surface ofthe seed film 19 in the second region R2) is 50 μm to 75 μm as describedabove. Furthermore, the sheet film and the seed film 19 may be removedafter this polishing process.

Through the above processes, the first plated electrode 15 and thesecond plated electrode 16 are formed. In this stage, the presentlight-emitting element 1 is provided on the wafer, so that afterperforming a predetermined inspection process, the scribing region ofthe wafer is cut or divided by a known dicing process. Thus, the presentlight-emitting element 1 as a chip is provided.

The first plated electrode 15 is electrically connected to the surfaceof the p electrode 12 exposed in the first opening 17 of the protectiveinsulating film 14, through the seed film 19 right under the firstplated electrode 15. Furthermore, the second plated electrode 16 iselectrically connected to the surface of the n electrode 13 exposed inthe second opening 18 of the protective insulating film 14, through theseed film 19 right under the second plated electrode 16.

As described above, the waste heat due to the light-emitting operationof the present light-emitting element 1 is mostly generated from aninside of the semiconductor laminated portion 11 (mesa) in the firstregion R1, especially from the active layer 7, so that the waste heatcan be efficiently released to the outside through the first platedelectrode 15 which is mainly composed of copper having high thermalconductivity and completely covers the upper surface and the sidesurface of the semiconductor laminated portion 11. Furthermore, thefirst plated electrode 15 has a large area which covers not only thefirst region R1 but also one part of the second region R2 in planarview, so that a contact area between the first plated electrode 15 andthe electrode pad on the package can be largely ensured after theflip-chip mounting. As a result, a heat releasing effect can beconsiderably improved compared with a case where the p electrode isconnected to the electrode pad on the package by flip-chip mountingwithout providing the first plated electrode 15.

Second Embodiment

Hereinafter, the second embodiment of the present light-emitting element1 will be described as one variation of the first embodiment. FIG. 10schematically shows one example of an element structure in a right sidein the Y direction (region of X≧0) in the present light-emitting element1 of the second embodiment. FIG. 10 is a cross-sectional view of thepresent light-emitting element 1 parallel to the X-Z plane along theline B-B′ in the plan view in FIG. 8.

In the second embodiment, as shown in FIG. 10, the presentlight-emitting element 1 further includes a plated metal film 20covering the surface (exposed surface) of the first plated electrode 15,and a plated metal film 21 covering the surface (exposed surface) of thesecond plated electrode 16. Here, at least uppermost surface of each ofthe plated metal films 20 and 21 is composed of metal (such as gold(Au)) having smaller ionization tendency than copper composing the firstand second plated electrodes 15 and 16, so that even when the presentlight-emitting element 1 is stored in an oxygen atmosphere during aperiod before the flip-chip mounting, the surfaces (covered with theplated metal films 20 and 21) of the first and second plated electrodes15 and 16 are not likely to be oxidized, compared with the case wherethe surfaces are not covered with the plated metal films 20 and 21.Furthermore, the covered surface can be prevented from being oxidized ina high-temperature process during the soldering process at the time offlip-chip mounting. In addition, in a case where the surfaces of thefirst and second plated electrodes 15 and 16 have substantially nopossibility, that is, no possibility or extremely low possibility, ofbeing oxidized, the plated metal films 20 and 21 are not necessarilyprovided.

In the second embodiment, after the protective insulating film 14, thefirst plated electrode 15, and the second plated electrode 16 in thefirst embodiment are manufactured, the plated metal films 20 and 21 eachcomposed of a three-layer metal film of Ni/Pd/Au sequentially providedfrom bottom are formed on the exposed surfaces of the polished firstplated electrode 15 and the polished second plated electrode 16 by aknown electroless plating method included in a wet plating method.

Thicknesses of the layers of Ni/Pd/Au of each of the plated metal films20 and 21 are 3 μm to 7.5 μm/5 nm to 15 nm/5 nm to 15 nm, from bottom,respectively. Furthermore, each of the plated metal films 20 and 21 isnot always required to be composed of the three-layer metal film, andeach of the plated metal films 20 and 21 may be a single-layer metalfilm, or a multiple-layer metal film other than three layers.Furthermore, the materials of the plated metal films 20 and 21 are notlimited to the above materials, while the uppermost layer is preferablycomposed of gold (Au)

The second embodiment differs from the first embodiment in that thesurfaces of the first and second plated electrodes 15 and 16 are coveredwith the plated metal films 20 and 21, respectively. Therefore,planarly-viewed patterns of the plated metal films 20 and 21 in thepresent light-emitting element 1 in the second embodiment are almost thesame as those of the first and second plated electrodes 15 and 16 in thepresent light-emitting element 1 in the first embodiment shown in FIG. 9except that they are thicker due to the thicknesses of the plated metalfilms 20 and 21, so that their drawings are omitted.

In the second embodiment, a distance between the plated metal film 20covering the first plated electrode 15, and the plated metal film 21covering the second plated electrode 16 is smaller than the distancebetween the first and second plated electrodes 15 and 16 due to thethicknesses of the plated metal films 20 and 21. Accordingly, it ispreferable that the distance between the first and second platedelectrodes 15 and 16 is set previously longer than a desired distance bythe thicknesses of the plated metal films 20 and 21 or more.

Third Embodiment

Hereinafter, the third embodiment of the present light-emitting element1 will be described as one variation of the first or second embodiment.FIG. 11 schematically shows one example of an element structure in aright side in the Y direction (region of X≧0) in the presentlight-emitting element 1 of the third embodiment. FIG. 11 is across-sectional view of the present light-emitting element 1 parallel tothe X-Z plane along the line B-B′ in the plan view in FIG. 8. Here, theelement structure shown in FIG. 11 is an element structure as onevariation of the first embodiment, and plated metal films 20 and 21described in the second embodiment are not shown.

In the third embodiment, as shown in FIG. 11, the present light-emittingelement 1 further includes an ultraviolet light reflective layer 22which reflects the ultraviolet light emitted from the active layer 7 ofthe present light-emitting element 1, and formed between the firstplated electrode 15 and the protective insulating film 14, specificallybetween the seed film 19 on the first plated electrode 15 side and theprotective insulating film 14. In the present light-emitting element 1in each of the first to third embodiments, the protective insulatingfilm 14 is the SiO₂ film or Al₂O₃ film which transmits the ultravioletlight. Ni or Ti/Cu which is the component of the seed film 19 coveringthe upper surface and the side surface of the mesa reflects theultraviolet light at an ultraviolet light reflectivity (about 33% in thecase of copper, for example) corresponding to a light emissionwavelength of the present light-emitting element 1. When an ultravioletlight reflectivity of a component of the ultraviolet light reflectivelayer 22 is higher than the ultraviolet light reflectivity of the seedfilm 19, the ultraviolet light emitted from the active layer 7 passesthrough the protective insulating film 14 and then the ultraviolet lightis reflected at an interface between the ultraviolet light reflectivelayer 22 and the protective insulating film 14 toward the semiconductorlaminated portion 11 at the higher reflectivity than the seed film 19.Thus, the reflected ultraviolet light partially passes through thesubstrate 2 and extracted outside the present light-emitting element 1.Therefore, according to the present light-emitting element 1 in thethird embodiment, light emission efficiency is improved.

In this embodiment, as one example, the ultraviolet light reflectivelayer 22 is composed of a single-layer or multiple-layer film containingany one of aluminum (Al), rhodium (Rh), and iridium (Ir) having a higherultraviolet light reflectivity than the seed film 19. A thickness of theultraviolet light reflective layer 22 which is an aluminum single-layerfilm is about 100 nm.

Hereinafter, a manufacturing procedure of the ultraviolet lightreflective layer 22 will be described. The ultraviolet light reflectivelayer 22 is formed after the first opening 17 and the second opening 18are formed in the protective insulating film 14 and before the seed film19 is formed on the whole substrate surface in the first embodiment, insuch a manner that a photoresist having a reverse pattern of theultraviolet light reflective layer 22 is formed on the whole substratesurface, a single-layer or multiple-layer metal film as the ultravioletlight reflective layer 22 is formed by sputtering or electron beamevaporation method. Then the photoresist is removed by a liftoff methodto remove the metal film formed on the photoresist. Thus, theultraviolet light reflective layer 22 is formed as shown in FIG. 11.

After the ultraviolet light reflective layer 22 is formed, the processfor forming the seed film 19 and the subsequent processes are performed,as described in the first embodiment, and then the first platedelectrode 15 and the second plated electrode 16 are formed. In the thirdembodiment also, after the first plated electrode 15 and the secondplated electrode 16 are formed and polished, the plated metal films 20and 21 described in the second embodiment may be formed as needed.

Since the third embodiment differs from the first embodiment in that theultraviolet light reflective layer 22 is formed between the seed film 19and the protective insulating film 14, a planarly-viewed pattern of thefirst plated electrode 15 in the present light-emitting element 1 in thethird embodiment is the same or almost the same as the planarly-viewedpattern of the first plated electrode 15 in the present light-emittingelement 1 in the first embodiment shown in FIG. 9, and a planarly-viewedpattern of the second plated electrode 16 in the present light-emittingelement 1 in the third embodiment is the same as the planarly-viewedpattern of the second plated electrode 16 in the present light-emittingelement 1 in the first embodiment shown in FIG. 9, so that theirdrawings are omitted. The ultraviolet light reflective layer 22 which isformed in the side wall portion of the mesa and in the second region R2does not affect the outer line of the first plated electrode 15basically.

Here, in the element structure shown in FIG. 11, then electrode 13exists below the first plated electrode 15 in the second region R2through the protective insulating film 14. Therefore, in a case wherethe multiple-layer metal film of the n electrode 13 partially includesan Al layer having a high ultraviolet light reflectivity, the originaleffect cannot be exerted even in the formation of the ultraviolet lightreflective layer 22 on the n electrode 13. Therefore, the ultravioletlight reflective layer 22 is not always required to be provided in awhole region between the seed film 19 on the first plated electrode 15side and the protective insulating film 14, and there is no need toprovide the ultraviolet light reflective layer 22 at least at a portionoverlapping with the n electrode 13. However, in a case where the regionhaving the n electrode 13 and the region not having the n electrode 13are mixed under the first plated electrode 15 in the second region R2through the protective insulating film 14, the ultraviolet lightreflective layer 22 may be provided in the whole region between the seedfilm 19 on the first plated electrode 15 side and the protectiveinsulating film 14.

Fourth Embodiment

Hereinafter, the fourth embodiment of the present light-emitting element1 will be described as one variation of the first to third embodiments.FIG. 12 schematically shows one example of an element structure in aright side in the Y direction (region of X≧0) in the presentlight-emitting element 1 of the fourth embodiment. FIG. 12 is across-sectional view of the present light-emitting element 1 parallel tothe X-Z plane along the line B-B′ in the plan view in FIG. 8. Here, theelement structure shown in FIG. 12 is an element structure as onevariation of the first embodiment, and plated metal films 20 and 21described in the second embodiment and the ultraviolet light reflectivelayer 22 described in the third embodiment are not shown.

In the fourth embodiment, as shown in FIG. 12, the presentlight-emitting element 1 locally includes an opaque insulating film 24which does not transmit the ultraviolet light emitted from the activelayer 7 of the present light-emitting element 1 and is formed on theprotective insulating film 14 which is exposed in a bottom portion of agap 23 between the first plated electrode 15 and the second platedelectrode 16, after the plating sheet film and the seed film 19 areremoved.

The present light-emitting element 1 in any one of the first to fourthembodiments includes the protective insulating film 14 composed of theSiO₂ film or the Al₂O₃ film which transmits the ultraviolet light.Therefore, the ultraviolet light emitted from the active layer 7 of thepresent light-emitting element 1 is partially not emitted outside from aback surface of the substrate 2 but reflected toward the semiconductorlaminated portion 11, passes through the protective insulating film 14exposed in the bottom portion of the gap 23, and enters the gap 23.Here, depending on a composition of a resin filled in the gap 23, theresin could be deteriorated because the resin is exposed to theultraviolet light which entered the gap 23. Furthermore, a short circuitcould be caused between the first and second plated electrodes 15 and 16because a solder component such as tin attached to the first and secondplated electrodes 15 and 16 is diffused by a photochemical reaction andan electric field applied between the first and second plated electrodes15 and 16. However, when the opaque insulating film 24 is provided tocover the bottom portion of the gap 23, the resin filled between thefirst and second plated electrodes 15 and 16 can be prevented from beingexposed to the ultraviolet light, and as a result, the above defect suchas deterioration and short circuit can be prevented.

In this embodiment, the opaque insulating film 24 is an insulating filmcomposed of GaP, GaN, GaAs, SiC, or SiN and formed by a method inaccordance with the material to be used. For example, the opaqueinsulating film 24 composed of GaP is formed by sputtering, and theopaque insulating film 24 composed of GaN, GaAs, SiC, or SiN is formedby CVD. A thickness of the opaque insulating film 24 is about 300 nm,and a larger thickness is preferable as a light-blocking film.

Hereinafter, a procedure for manufacturing the opaque insulating film 24will be described. The opaque insulating film 24 is formed by depositingGaP on the whole substrate surface by sputtering as one example afterthe first and second plated electrodes 15 and 16 are formed, and theplating sheet film and the seed film 19 are removed and before the uppersurfaces of the first and second plated electrodes 15 and 16 arepolished in the first embodiment. Subsequently, the CMP in the firstembodiment is performed. Through this polishing process, the GaPdeposited on the upper surfaces of the first and second platedelectrodes 15 and 16 is removed first, and then the upper surfaces ofthe first and second plated electrodes 15 and 16 are polished andplanarized, whereby the upper surfaces of the first and second platedelectrodes 15 and 16 are leveled with each other. On the other hand, thedeposited GaP is left on the bottom surface of the gap 23 between thefirst and second plated electrodes 15 and 16 without being polished,whereby the opaque insulating film 24 is formed. Furthermore, the GaPattached on the side wall surfaces of the first and second platedelectrodes 15 and 16 may be left without being polished. In addition,since the above processes are performed on the wafer, the gap 23 betweenthe first and second plated electrodes 15 and 16 is not only the gapbetween the first and second plated electrodes 15 and 16 in the sameelement region, but also a gap between the first plated electrodes 15 inthe adjacent element regions, a gap between the second plated electrodes16 in the adjacent element regions, or a gap between the one platedelectrode 15 and the other second plated electrode 16 in the adjacentelement regions. Thus, the opaque insulating film 24 is formed on thebottom surface of each of the above gaps 23.

In the fourth embodiment also, the plated metal films 20 and 21described in the second embodiment may be formed as needed after thefirst and second plated electrodes 15 and 16 are formed and polished.Furthermore, in the fourth embodiment also, the ultraviolet lightreflective layer 22 described in the third embodiment may be formed asneeded after the first opening 17 and the second opening 18 are formedin the protective insulating film 14 and before the seed film 19 isformed on the whole substrate surface. Still furthermore, in the fourthembodiment also, the plated metal films 20 and 21 described in thesecond embodiment and the ultraviolet light reflective layer 22described in the third embodiment both may be formed.

Here, in the element structure shown in FIG. 12, the n electrode 13exists under the exposed protective insulating film 14 in the gap 23between the first and second plated electrodes 15 and 16, so that in acase where the multiple-layer metal film of the n electrode 13 partiallyincludes an Al layer having a high ultraviolet light reflectivity, theultraviolet light emitted toward the gap 23 is reflected by the Al layerin the n electrode 13, and not enter the gap 23. In this case, theopaque insulating film 24 is not necessarily provided on the bottomportion of the gap 23. However, the outer line of the first platedelectrode 15 is not limited to the case where the first plated electrode15 is located above the n electrode 13 through the protective insulatingfilm 14 as illustrated in FIG. 9, so that it is effective to provide theopaque insulating film 24 in the gap 23 not having the n electrode 13 onits lower side.

Fifth Embodiment

Hereinafter, the fifth embodiment of the present light-emitting element1 will be described as one variation of the first or second embodiment.In the present light-emitting element 1 in the first or secondembodiment, the protective insulating film 14 is a film which transmitsthe ultraviolet light such as the SiO₂ film or Al₂O₃ film. However, inthe case where the protective insulating film 14 is composed of thematerial which transmits the ultraviolet light, light emissionefficiency can be improved by providing the ultraviolet light reflectivelayer 22 described in the third embodiment. On the other hand, dependingon the composition of the resin filled in the gap 23 between the firstplated electrode 15 and the second plated electrode 16, and thus, thedefect described in the fourth embodiment could be caused, but thedefect can be prevented by providing the opaque insulating film 24.

In the fifth embodiment, the protective insulating film 14 is composedof a material which does not transmit the ultraviolet light like theopaque insulating film 24 described in the fourth embodiment, such asGaP, GaN, GaAs, SiC, or SiN by a known method such as CVD method orsputtering method, instead of being composed of the material whichtransmits the ultraviolet light. The protective insulating film 14 inthis case is formed to have a thickness of 100 nm to 1 μm, or morepreferably 150 nm to 350 nm similar to the first embodiment.

In the fifth embodiment, since the protective insulating film 14 iscomposed of the material which does not transmit the ultraviolet light,the ultraviolet light emitted from the active layer 7 of the presentlight-emitting element 1 is prevented from entering the gap 23 throughthe protective insulating film 14. Accordingly, it is not necessary toseparately provide the opaque insulating film 24 described in the fourthembodiment, on the bottom portion of the gap 23. Furthermore, in thefifth embodiment, the ultraviolet light reflective layer 22 described inthe third embodiment is not required because the ultraviolet lightreflective layer 22 exerts no effects. Furthermore, in the fifthembodiment also, the plated metal films 20 and 21 described in thesecond embodiment may be formed as needed after the first platedelectrode 15 and the second plated electrode 16 are formed and polished.

However, depending on the material to be used for the protectiveinsulating film 14 such as SiN, the film could transmit the ultravioletlight when the film is thin, so that the film could be asemi-transmissive film to the ultraviolet light. In this case, similarto the first embodiment, the ultraviolet light reflective layer 22described in the third embodiment or the opaque insulating film 24described in the fourth embodiment, or both of them may be employed asneeded.

Sixth Embodiment

FIG. 13 is a schematic cross-sectional view showing one configurationexample of a nitride semiconductor ultraviolet light-emitting device inwhich the present light-emitting element 1 is mounted on a submount 30(corresponding to a base) by flip-chip mounting (hereinafter, referredto as the “present light-emitting device” occasionally). In FIG. 13, thepresent light-emitting element 1 is mounted on the submount 30 upsidedown, that is, with the upper surfaces of the first and second platedelectrodes 15 and 16 facing downward. The present light-emitting element1 has the element structure which is one of the element structuresdescribed in the first to fifth embodiments or a combined elementstructure of those, and is used as a diced chip. In addition, FIG. 13shows a cross-sectional structure (parallel to the X-Z plane along theline B-B′ in the plan view in FIG. 8) in which the presentlight-emitting element 1 described in the first embodiment is used asone example. Furthermore, as for the X-Y-Z coordinate axes in FIG. 13and FIGS. 14A, 14B, and 15 which will be described later, since thedevice is shown based on the present light-emitting element 1, +Zdirection extends downward in these drawings.

FIG. 14A is a plan view showing a planarly-viewed shape of the submount30, and FIG. 14B is a cross-sectional view of a cross-sectional shapeparallel to the X-Z plane passing through a center of the submount 30 inthe plan view in FIG. 14A. The submount 30 is configured such that afirst metal electrode wiring 32 on an anode side and a second metalelectrode wiring 33 on a cathode side are formed on a part of a surfaceof a base material 31 composed of an insulating material, and athickness D1 of a side wall 34 of the base material 31 is larger than athickness D2 in a center portion provided inside the side wall 34 sothat a sealing resin 35 for sealing the present light-emitting element 1can be filled in a space surrounded by the side wall 34. Furthermore, asemi-spherical condenser lens 36 composed of quartz glass andtransmitting the ultraviolet light emitted from the presentlight-emitting element 1 is fixed on an upper surface of the side wall34. The sealing resin 35 is covered with the lens 36, and fixed in thespace surrounded by the side wall 34. Furthermore, the first and secondmetal electrode wirings 32 and 33 are connected to lead terminals 37 and38 provided on a back surface of the base material 31, respectively,through penetration electrodes (not shown) provided in the base material31. In a case where the submount 30 is mounted on another printedsubstrate, metal wirings on the printed substrate are electricallyconnected to the lead terminals 37 and 38. Furthermore, the leadterminals 37 and 38 cover an almost entire surface of the base material31 and serve as a heat sink. In this embodiment, the base material 31 ofthe submount 30 is composed of an insulating material such as AlN.Furthermore, the base material 31 is preferably composed of AlN in viewof heat releasing property, but the base material 31 may be composed ofceramics such as alumina (Al₂O₃). Each of the first and second metalelectrode wirings 32 and 33 includes a thick copper-plated film, and athree-layer metal film of Ni/Pd/Au formed thereon by electrolessplating, as one example. In the above one example, the first and secondmetal electrode wirings 32 and 33 are configured similarly to the firstand second plated electrodes 15 and 16 and the plated metal films 20 and21 in the present light-emitting element 1. Furthermore, an ultravioletlight transmittance of the lens 36 is to be suitable for the lightemission wavelength of the present light-emitting element 1 to be used.Furthermore, instead of the lens 36 composed of quartz glass, a surfaceof the sealing resin 35 may be formed into a light-condensing curvedsurface such as spherical surface. Furthermore, the lens 36 may be alight-diffusing lens for the intended use, other than the condenserlens, or the lens 36 is not always needed.

As shown in FIGS. 14A and 14B, the first and second metal electrodewirings 32 and 33 are formed to be exposed on the surface of a centerportion of the base material 31 surrounded by the side wall 34, and thefirst and second metal electrode wirings 32 and 33 are spaced apart fromeach other to be electrically separated. The first metal electrodewiring 32 includes a first electrode pad 32 a and a first wiring portion32 b connected to the first electrode pad 32 a. Furthermore, the secondmetal electrode wiring 33 includes four second electrode pads 33 a and asecond wiring portion 33 b connected to the second electrode pads 33 a.The first electrode pad 32 a has a planarly-viewed shape slightly largerthan the planarly-viewed shape of the first plated electrode 15 of thepresent light-emitting element 1, and located in a center of the centerportion of the base material 31. Planarly-viewed shapes and positions ofthe second electrode pads 33 a are set such that when the presentlight-emitting element 1 is disposed with the first plated electrode 15facing the first electrode pad 32 a, four second plated electrodes 16face four second electrode pads 33 a, respectively. In FIG. 14A,hatching is applied to the first electrode pad 32 a and the secondelectrode pads 33 a, respectively.

The present light-emitting element 1 is mounted and fixed on the centerportion of the base material 31 with the upper surfaces of the first andsecond plated electrodes 15 and 16 facing downward, and by soldering,the first plated electrode 15 and the four second plated electrodes 16are electrically and physically connected to the first electrode pad 32a and the four second electrode pads 33 a, respectively. In thisembodiment, the present light-emitting element 1 is mounted on thesubmount 30 by flip-chip mounting.

As the sealing resin of the ultraviolet light-emitting element,fluorine-based resin and silicone resin are proposed to be used, but ithas been found that the silicone resin deteriorates when the siliconeresin is excessively exposed to the ultraviolet light. Especially, asthe ultraviolet light-emitting element is increasingly required toachieve a higher output, an energy density of the emitted light tends toincrease, and power consumption is accordingly increased to cause alarge amount of heat generation. Thus, the sealing resin problematicallydeteriorates due to the heat generation and the ultraviolet light havingthe high energy density.

It has been also found that the fluorine-based resin is excellent inheat resistance and high in ultraviolet light resistance, but thegeneral fluorine resin such as polytetrafluoroethylene is opaque. As forthe fluorine-based resin, a polymer chain is rectilinear and rigid, andeasily crystalized, so that a crystalline portion and an amorphousportion are mixed, and the light scatters at its interface, which makesthe resin opaque.

In this embodiment, an amorphous fluorine resin is used as the sealingresin 35 because an amorphous fluorine resin is excellent in heatresistance, ultraviolet light resistance, and ultraviolet lightpermeability. The amorphous fluorine resin includes an amorphizedpolymer alloy provided by copolymerizing a fluorine resin of acrystalline polymer, a copolymer of perfluorodioxole (trade name, TeflonAF (registered trademark) manufactured by Du Pont Kabushiki Kaisha), anda cyclized polymer of perfluoro butenyl vinyl ether (trade name, Cytop(registered trademark) manufactured by Asahi Glass Co., Ltd). Thefluorine resin of the latter cyclized polymer is likely to becomeamorphous because its main chain has a cyclic structure, so thattransparency is high. The amorphous fluorine resin is roughly dividedinto two kinds, that is, a bonding fluorine resin having a reactivefunctional group which can be bonded to metal, and a non-bondingfluorine resin having a non-reactive functional group which is notbonded to metal.

In the case where the present light-emitting element 1 described in oneof the first to fifth embodiments is mounted on the submount 30, thereis a gap between the base material 31 of the submount 30 and the presentlight-emitting element 1. Therefore, when the present light-emittingelement 1 described in one of the first to fifth embodiments is sealedwith the sealing resin 35 of the amorphous fluorine resin, the sealingresin 35 is naturally introduced in this gap. As described above, whenthe bonding amorphous fluorine resin is irradiated with the high-energyultraviolet light during light emitting operation by the ultravioletlight-emitting element, there is a possibility that due to aphotochemical reaction of the amorphous fluorine resin, and the electricfield applied between the electrodes, a metal atom of the pad electrodeand a metal atom in the solder material are separated and migrated,which causes a short circuit between the electrodes of the ultravioletlight-emitting element. Thus, in order to prevent the short circuit fromoccurring, the above-described non-bonding amorphous fluorine resin ispreferably used as the sealing resin 35.

The above non-bonding amorphous fluorine resin is an amorphous fluorineresin composed of a polymer or copolymer having a non-reactive terminalfunctional group. Specifically, the non-bonding amorphous fluorine resinhas a fluorine-containing aliphatic ring structure as a structure unitcomposing the polymer or the copolymer, and the above terminal functiongroup is a perfluoroalkyl group such as CF₃. That is, the non-bondingamorphous fluorine resin does not have a reactive terminal functionalgroup which is bonded to metal.

Hereinafter, a method for manufacturing the present light-emittingdevice will be briefly described with reference to FIG. 15. FIG. 15 isan essential-part cross-sectional view schematically showing a portionin which the first and second plated electrodes 15 and 16 are connectedto the first and second metal electrode wirings 32 and 33, respectivelywith a solder 39 in the present light-emitting device shown in FIG. 13(cross-sectional part parallel to the X-Z plane along the ling B-B′ inthe plan view in FIG. 8).

First, a bare chip of the diced present light-emitting element 1 isfixed on the first and second metal electrode wirings 32 and 33 of thesubmount 30 by the known flip-chip mounting. Specifically, the firstplated electrode 15 is physically and electrically connected to thefirst metal electrode wiring 32 through the solder 39, and the secondplated electrode 16 is physically and electrically connected to thesecond metal electrode wiring 33 through the solder 39 (step 1). Thus,the p electrode 12 of the present light-emitting element 1 iselectrically connected to the first metal electrode wiring 32, and the nelectrode 13 of the present light-emitting element 1 is electricallyconnected to the second metal electrode wiring 33. The soldering processcan be performed by a known soldering method such as reflow soldering,so that a detailed description is omitted.

Subsequently, a coating liquid is prepared by dissolving the non-bondingamorphous fluorine resin in a fluorine-containing solvent, preferably anaprotic fluorine-containing solvent and injected into the spacesurrounded by the side wall 34 of the submount 30 with ahighly-strippable Teflon needle, and the solvent is volatilized whilethe coating liquid is gradually heated. Thus, a first resin film of thenon-bonding amorphous fluorine resin is formed in each of an inner wallsurface of the side wall 34 of the submount 30, the upper surfaces ofthe first and second metal electrode wirings 32 and 33, the exposedsurface of the base material 31 between the first and second metalelectrode wirings 32 and 33, the upper surface and side surface of thepresent light-emitting element 1, and the gap between the presentlight-emitting element 1 and the upper surface of the submount 30 (step2). In addition, regarding the volatilization of the solvent in step 2,in order not to leave any air bubbles in the first resin film, thesolvent is to be heated and volatilized by gradually increasing thetemperature from a low temperature range (such as around roomtemperature) lower than a boiling point of the solvent to a hightemperature range (such as around 200° C.) higher than the boiling pointof the solvent.

Next, a solid non-bonding amorphous fluorine resin is put into an insideand an upper space of the first resin film formed in the spacesurrounded by the side wall 34 of the submount 30 in step 2, melted at250° C. to 300° C., for example, and then gradually cooled down, andthus a second resin film is formed (step 3).

Finally, the lens 36 is fixed to the upper surface of the side wall 34(step 4), and thus the present light-emitting device shown in FIG. 13 ismanufactured. According to the above manufacturing method, the sealingresin 35 is composed of the first and second resin films. As disclosedin Patent Document 1, the lens 36 is fixed to the upper surface of theside wall 34 with a bonding agent, or fixed to the upper surface of theside wall 34 by an engagement structure provided in the lens 36 and theside wall 34. The method for forming the sealing resin 35 and the methodfor fixing the lens 36 are not limited to the method described above.Furthermore, the lens 36 is not always required to be provided.

In the present light-emitting device, a soldering area between the firstplated electrode 15 and the first metal electrode wiring 32 can beconsiderably larger than a connection area in a conventional connectionconfiguration in which the comb-shaped p electrode 12 of the presentlight-emitting element 1 is connected to the first metal electrodewiring 32 through a plurality of small bumps without providing the firstplated electrode 15. As a result, the waste heat generated in the lightemitting operation of the present light-emitting element 1 can beefficiently transmitted toward the lead terminal 37 through the firstplated electrode 15 and the first metal electrode wiring 32, so that theheat releasing efficiency is considerably improved.

Other Embodiments

Hereinafter, variations of the first to sixth embodiments will bedescribed.

<1> According to the first to fifth embodiments, the one first region issurrounded by the second region in the planarly-viewed shape of thepresent light-emitting element 1, but the first region may be dividedinto a plurality of sub-regions, and each of the sub-regions may besurrounded by the second region. That is, a plurality of mesas may existin one element region, and the first plated electrode 15 may be formedwith respect to each of the mesas, or the one first plated electrode 15may be formed to cover the plurality of mesas.

<2> According to the first to fifth embodiments, in the plating processin the manufacturing processes of the present light-emitting element 1,the polishing process is performed to planarize the uneven uppersurfaces of the first and second plated electrodes 15 and 16, and levelthe upper surfaces thereof with each other. However, the polishingprocess may not be performed in a case where the soldering can beproperly performed when the present light-emitting element 1 is mountedby the flip-chip mounting, regardless of the unevenness and thedifference in height of the unpolished upper surfaces of the first andsecond plated electrodes 15 and 16.

<3> According to the fourth embodiment, the opaque insulating film 24 isformed on the bottom portion of the gap 23 between the first and secondplated electrodes 15 and 16 by the method in which the opaque insulatingfilm 24 is deposited on the whole substrate surface, and then the opaqueinsulating film 24 deposited on the upper surfaces of the first andsecond plated electrodes 15 and 16 are partially removed in thepolishing process for the upper surfaces of the first and second platedelectrodes 15 and 16. In this case, an etching process for patterningthe opaque insulating film 24 is not required, and an etching mask isalso not required, so that the process can be simplified.

However, in a case where patterning is performed for the opaqueinsulating film 24 as needed before or after the polishing process forthe first and second plated electrodes 15 and 16, photolithography andetching may be used.

<4> According to the present light-emitting element 1, the first platedelectrode 15 is formed in the pre-plating element structure in which theprotective insulating film 14 and the first and second plated electrodes15 and 16 are not formed yet, and completely covers the semiconductorlaminated portion 11 (mesa) and the p electrode 12 formed on thesemiconductor laminated portion 11 in the first region R1, so that itsarea of the upper surface is larger than the p electrode 12. As aresult, the waste heat generated in the mesa due to the light emittingoperation of the present light-emitting element 1 can be efficientlyreleased. Thus, in the above first to fifth embodiments, the presentlight-emitting element 1 has both of the first and second platedelectrodes 15 and 16, but the above effect of efficiently releasing thewaste heat to the outside can be almost similarly provided even when thesecond plated electrode 16 is not provided.

However, in a case where the first plated electrode 15 is only providedwithout providing the second plated electrode 16, when the first platedelectrode 15 and the n electrode 13 are connected to the first andsecond electrode pads 32 a and 33 a on the base of the submount 30,respectively with a gold bump similar to the conventional flip-chipmounting, the thickness of the first plated electrode 15 needs to beconsiderably small to reduce a difference in height between the uppersurface of the first plated electrode 15 and the upper surface of the nelectrode 13, compared with the case where both of the first and secondplated electrodes 15 and 16 are provided.

<5> According to the sixth embodiment, the description has been given tothe present light-emitting device in which the one presentlight-emitting element 1 is mounted on the submount 30, but a pluralityof the present light-emitting elements 1 may be mounted on the submountor the base such as the printed substrate, in the present light-emittingdevice. In this case, the plurality of the present light-emittingelements 1 may be collectively sealed or may be individually sealed withthe sealing resin 35. In this case, a resin dam is formed on the surfaceof the base to surround the one or more present light-emitting elements1 to be sealed, and the sealing resin 35 is formed in the regionsurrounded by the resin dam in the manner described in the sixthembodiment,

The present light-emitting element 1 can be directly mounted on aprinted substrate with a solder because the upper surfaces of the firstand second plated electrodes 15 and 16 can be planarized and leveledwith each other, similarly to another surface mount type electronicdevice or an electric element (resistive element, capacitor, diode, ortransistor). Therefore, the plurality of the present light-emittingelements 1 may be mounted on the one base, and mounted on the same basetogether with another surface mount type electronic device or electricelement. Furthermore, the base to be used for the present light-emittingelement 1 is not limited to the submount and the printed substrate.

<6> According to the present light-emitting element 1, the first platedelectrode 15 is formed in the pre-plating element structure in which theprotective insulating film 14 and the first and second plated electrodes15 and 16 are not formed yet, and completely covers the semiconductorlaminated portion 11 (mesa) and the p electrode 12 formed on thesemiconductor laminated portion 11 in the first region R1, so that itsarea of the upper surface is larger than the p electrode 12. As aresult, the waste heat generated in the mesa due to the light emittingoperation of the present light-emitting element 1 can be efficientlyreleased.

Therefore, the pre-plating element structure of the presentlight-emitting element 1 is not limited to the pre-plating elementstructure having the laminated structure, the material, the thickness,and the AlN mole fraction shown in FIGS. 1 and 2 and described in thefirst embodiment, and the pre-plating element structure can be variouslychanged. For example, the template 5 is shown in FIG. 1 as one example,but the template 5 may not be limited to the one shown in FIG. 1. Forexample, an ELO-AlN layer may be formed by growing the AlN layer 3 byepitaxial lateral-direction growth method, the AlGaN layer 4 may beomitted, or another substrate may be used instead of the sapphiresubstrate 2. Furthermore, the thickness and the AlN mole fraction of theAlGaN layer or the GaN layer in the present light-emitting element 1described in the above embodiment is only one example, and they can beappropriately changed based on a specification of the element.Furthermore, according to the above embodiment, the electron block layer8 is provided, but the electron block layer 8 is not necessarilyprovided.

However, it is to be noted that the pre-plating element structure of thepresent light-emitting element 1 assumes the case where the centeremission wavelength is 355 nm or less, so that the structure needs toinclude the semiconductor laminated portion having, in a laminatedmanner, the first semiconductor layer composed of the one or more n-typeAlGaN-based semiconductor layers, the active layer composed of the oneor more AlGaN-based semiconductor layers having the AlN mole fraction ofzero or more, and the second semiconductor layer composed of the one ormore p-type AlGaN-based semiconductor layers, the n electrode composedof the one or more metal layers, and the p electrode composed of the oneor more metal layers. Furthermore, it is preferable that the firstregion R1 has the recess surrounding the second region R2 from the threedirections, in the planarly-viewed shape, the second region R2 includesthe recessed region R3 surrounded by the recess of the first region R1and the periphery region R4 other than the recessed region R3, the nelectrode 13 is formed on the first semiconductor layer in the secondregion R2 and covers the recessed region R3 and the periphery region R4,and the p electrode 12 is formed on the uppermost layer of the secondsemiconductor layer.

INDUSTRIAL APPLICABILITY

The nitride semiconductor ultraviolet light-emitting element accordingto the present invention is applicable for a light-emitting diode havinga center emission wavelength of about 355 nm or less, and is effectivein improving heat release efficiency.

DESCRIPTION OF SYMBOLS

-   -   1 Nitride semiconductor ultraviolet light-emitting element    -   2 Sapphire substrate    -   3 AlN layer    -   4 AlGaN layer    -   5 Template    -   6 n-type clad layer (n-type AlGaN)    -   7 Active layer    -   7 a Barrier layer    -   7 b Well layer    -   8 Electron block layer (p-type AlGaN)    -   9 p-type clad layer (p-type AlGaN)    -   10 p contact layer (p-type GaN)    -   11 Semiconductor laminated portion    -   12 p electrode    -   13 n electrode    -   14 Protective insulating film    -   15 First plated electrode    -   16 Second plated electrode    -   17 First opening    -   18 Second opening    -   19 Seed film    -   20, 21 Plated metal film    -   22 Ultraviolet light reflective layer    -   23 Gap between first plated electrode and second plated        electrode    -   24 Opaque insulating film    -   30 Submount    -   31 Base material    -   32 First metal electrode wiring    -   32 a First electrode pad    -   32 b First wiring portion    -   33 Second metal electrode wiring    -   33 a Second electrode pad    -   34 Side wall    -   35 Sealing resin    -   36 Lens    -   37, 38 Lead terminal    -   101 Sapphire substrate    -   102 Base layer (AlN)    -   103 n-type clad layer (n-type AlGaN)    -   104 Multiple quantum well active layer    -   105 Electron block layer (p-type AlGaN)    -   106 p-type clad layer (p-type AlGaN)    -   107 p contact layer (p-type GaN)    -   108 p electrode    -   109 n electrode    -   BL Boundary line between first region and second region    -   C Boundary between recessed region and peripheral region    -   R1 First region    -   R2 Second region    -   R3 Recessed region    -   R4 Periphery region

The invention claimed is:
 1. A nitride semiconductor ultravioletlight-emitting element comprising: a semiconductor laminated portionincluding, in a laminated manner, a first semiconductor layer having oneor more n-type AlGaN-based semiconductor layers, an active layer havingone or more AlGaN-based semiconductor layers having an AlN mole fractionof zero or more, and a second semiconductor layer having one or morep-type AlGaN-based semiconductor layers; an n electrode including one ormore metal layers; a p electrode including one or more metal layers; aprotective insulating film; and a first plated electrode which is incontact with an exposed surface of the p electrode which is not coveredwith the protective insulating film, wherein referring to a region thatthe one nitride semiconductor ultraviolet light-emitting element isformed in a plane parallel to a surface of the semiconductor laminatedportion as an element region, the semiconductor laminated portionincludes the active layer and the second semiconductor layer laminatedon the first semiconductor layer in a first region which is a part ofthe element region, and does not include the active layer and the secondsemiconductor layer laminated on the first semiconductor layer in asecond region in the element region other than the first region, thefirst region has a recess surrounding the second region from threedirections in planarly-viewed shape, the second region continuously hasa recessed region surrounded by the recess of the first region, and aperiphery region other than the recessed region, the n electrode isformed on the first semiconductor layer in the second region and coversthe recessed region and the periphery region, the p electrode is formedon an uppermost surface of the second semiconductor layer, theprotective insulating film covers at least a whole outer side surface ofthe semiconductor laminated portion in the first region, an uppersurface of the first semiconductor layer provided between the firstregion and the n electrode, and an upper surface and a side surface ofan outer edge portion of the n electrode including a portion at leastfacing the first region, and does not cover and exposes at least onepart of a surface of the n electrode and at least one part of a surfaceof the p electrode, and the first plated electrode is composed of copperor alloy containing copper as a main component, formed by wet platingmethod, spaced apart from the exposed surface of the n electrode whichis not covered with the protective insulating film, and covers a wholeupper surface of the first region including the exposed surface of the pelectrode, the whole outer side surface of the first region covered withthe protective insulating film, and a boundary region which is a part inthe second region and is in contact with the first region.
 2. Thenitride semiconductor ultraviolet light-emitting element according toclaim 1, wherein the recessed region of the second region is entirelycovered with the first plated electrode through the protectiveinsulating film.
 3. The nitride semiconductor ultraviolet light-emittingelement according to claim 1, wherein the first plated electrode isspaced apart from the exposed surface of the n electrode which is notcovered with the protective insulating film, by 75 μm or more.
 4. Thenitride semiconductor ultraviolet light-emitting element according toclaim 1, wherein the protective insulating film further covers an uppersurface and a side surface around an outer edge portion of the pelectrode, and an exposed surface of the uppermost surface of the secondsemiconductor layer which is not covered with the p electrode.
 5. Thenitride semiconductor ultraviolet light-emitting element according toclaim 1, further comprising a second plated electrode formed at least onthe exposed surface of the n electrode which is not covered with theprotective insulating film, formed by the wet plating method andcomposed of copper or alloy containing copper as a main component,wherein the first plated electrode and the second plated electrode arespaced apart from each other.
 6. The nitride semiconductor ultravioletlight-emitting element according to claim 5, wherein surfaces of thefirst plated electrode and the second plated electrode are planarized,and heights of the surfaces vertical to the surface of the semiconductorlaminated portion are level with each other.
 7. The nitridesemiconductor ultraviolet light-emitting element according to claim 5,wherein a spaced distance between the first plated electrode and thesecond plated electrode is 75 μm or more.
 8. The nitride semiconductorultraviolet light-emitting element according to claim 5, wherein asingle-layer or multiple-layer plated metal film including gold at leaston an uppermost layer is formed on each of the surfaces of the firstplated electrode and the second plated electrode.
 9. The nitridesemiconductor ultraviolet light-emitting element according to claim 1,wherein an outer periphery of the first plated electrode is entirelylocated on the n electrode through the protective insulating film. 10.The nitride semiconductor ultraviolet light-emitting element accordingto claim 1, wherein the first plated electrode is formed and filled in adent in the recessed region surrounded by the outer side surface of thesemiconductor laminated portion in the first region, and an uppersurface of the first plated electrode is wholly flat.
 11. The nitridesemiconductor ultraviolet light-emitting element according to claim 1,wherein the wet plating method includes an electrolytic plating method,and a power-feeding seed film used in the electrolytic plating method isformed between the protective insulating film and the first platedelectrode.
 12. The nitride semiconductor ultraviolet light-emittingelement according to claim 11, wherein the protective insulating filmincludes a transparent insulating film composed of an insulatingmaterial which transmits ultraviolet light emitted from the activelayer, and an ultraviolet light refractive layer is formed between theprotective insulating film and the seed film to reflect the ultravioletlight at a reflectivity higher than an ultraviolet light reflectivity ofthe seed film.
 13. The nitride semiconductor ultraviolet light-emittingelement according to claim 1, wherein the protective insulating filmincludes a transparent insulating film composed of an insulatingmaterial which transmits ultraviolet light emitted from the activelayer, and an opaque insulating film is formed at least one part on theprotective insulating film between the first plated electrode and theexposed surface of the n electrode, and composed of an insulatingmaterial which does not transmit the ultraviolet light emitted from theactive layer.
 14. The nitride semiconductor ultraviolet light-emittingelement according to claim 1, wherein the protective insulating filmincludes an opaque insulating film composed of an insulating materialwhich does not transmit the ultraviolet light emitted from the activelayer.
 15. A nitride semiconductor ultraviolet light-emitting devicecomprising: a base including a metal film on a surface of an insulatingbase material, the metal film having a predetermined planarly-viewedshape and including two or more electrode pads; and the nitridesemiconductor ultraviolet light-emitting element according to claim 1mounted on the base with the first plated electrode facing the electrodepad, wherein the first plated electrode is electrically and physicallyconnected to the opposed electrode pad.
 16. The nitride semiconductorultraviolet light-emitting device according to claim 15, wherein thenitride semiconductor ultraviolet light-emitting element furtherincludes a second plated electrode formed at least on an exposed surfaceof the n electrode which is not covered with the protective insulatingfilm, formed by the wet plating method, and composed of copper or alloycontaining copper as a main component, the first plated electrode andthe second plated electrode are spaced apart from each other, and thefirst plated electrode is electrically and physically connected to theone electrode pad, and the second plated electrode is electrically andphysically connected to the other electrode pad, in the one nitridesemiconductor ultraviolet light-emitting element.
 17. The nitridesemiconductor ultraviolet light-emitting device according to claim 16,wherein the base includes a plurality of couples of electrode pads whicheach include a first electrode pad and at least one second electrode padelectrically separated from the first electrode pad, a plurality of thenitride semiconductor ultraviolet light-emitting elements are mounted onthe base, and the first plated electrode in the one nitridesemiconductor ultraviolet light-emitting element is electrically andphysically connected to the first electrode pad in the one couple ofelectrode pads, and the second plated electrode in the one nitridesemiconductor ultraviolet light-emitting element is electrically andphysically connected to the second electrode pad in the one couple ofelectrode pads.